1. Field of the Invention
This invention relates to a method and a drive unit for driving a capacitive load such as a liquid crystal cell at different potentials, and to a liquid crystal display (LCD) utilizing the same.
2. Description of the Related Art
Conventionally, a capacitive load (typically a liquid crystal cell of an LCD) that is driven at different potentials has a structure as shown in FIG. 12 and at the timing as depicted in FIG. 13. As shown in FIG. 12, a typical capacitive load 40 is a liquid crystal cell of an LCD located at a point of intersection of a signal electrode and a scanning electrode of the LCD. The capacitive load 40 has a capacitance Cs.
Supplied to one end of the capacitive load 40 is a driving potential Vs, and to the other end thereof a reference potential Vc. When the capacitive load 40 is a liquid crystal cell, the driving potential Vs serves as a signal potential to be supplied to the signal electrode of the cell, while the reference potential Vc serves as a scanning potential to be supplied to the scanning electrode.
A first power supply circuit 10 generates a first power supply potential V1 to be supplied to the load. Such potential hereinafter referred to as power supply potential. The output end of the first power supply circuit 10 is connected to the one end of the capacitive load 40 via a first switching circuit 12. A second power supply circuit 20 generates a second power supply potential V2 which is lower than the first power supply potential V1. The output end of the second power supply circuit 20 is connected to one end of the capacitive load 40 via a second switching circuit 22. It should be understood that the first and second power supply circuits 10 and 20, respectively, have additional circuit elements, but in FIG. 12 they are simply represented by respective amplifiers 11 and 21.
As seen in FIG. 12, when the first switching circuit 12 is switched on and the second switching circuit 22 is switched off, the capacitive load 40 is charged to pull the driving potential Vs to the first power supply potential V1. On the other hand, when the second switching circuit 22 is switched on and the first switching circuit 12 is switched off, the capacitive load 40 is discharged to pull the driving potential Vs to the second power supply potential V2.
As shown in FIG. 13, when the driving potential Vs is changed from the second power supply potential V2 to the first power supply potential V1 at time t1, current I proportional to the difference between the first and the second potentials and the capacitance Cs (i.e. I∝|V1−V2|×Cs) flows through the first power supply circuit 10. Similarly, when the driving potential Vs is changed from the first power supply potential V1 to the second power supply potential V2 at time t2, current I proportional to the voltage difference |V1−V2| and the capacitance Cs (i.e. proportional to |V1−V2|×Cs), flows through the second power supply circuit 20. It is noted that in actuality the magnitude of the current I depends on the time constant determined by the capacitance Cs and the resistance of the current path involved, but it is always proportional to the voltage difference |V1−V2|.
As described above, the current I flows through the cell during charging/discharging the cell in cycles of a period of T, say. Every time the current I flows, there appears across the current path a potential drop proportional to the magnitude of the current I and the resistance of the current path. Such potential drop disadvantageously causes an adverse influence on the liquid crystal cell (e.g. degradation of display quality of the cell). In addition, since the current I is supplied from the first and second power supply circuits 10 and 20, respectively, inevitable power consumption of the current I takes place in these power supply circuits.
Conventionally, when the potential of the signal electrode is changed from a high potential to a lower potential, the signal electrode is temporarily connected to a charge storage capacitor having a sufficiently large capacitance than the capacitances associated with the signal electrode and a scanning electrode before the change, as disclosed in, for example, Japanese Patent Application Laid Open 2004-93951 (referred to as Patent Document 1). A further method of driving an LCD is disclosed in, for example, Japanese Patent Application Laid Open 2004-93951, in which a signal electrode is temporarily connected to a charging capacitor prior to switching the potential coupled to the signal electrode from a lower potential to a higher potential.
A still further method of driving a simple matrix LCD, related to the present invention, is disclosed in Japanese Patent Application Laid Open 2004-145185 (referred to as Patent Document 2), in which front-end and rear-end PWM signal voltages are applied to the respective signal electrodes associated with the respective scanning electrodes substantially at the same times over a predetermined period of time.
Admittedly, the prior art of Patent Document 1 enables reduction of power to drive an LCD. However, this prior art requires a charge storage capacitor of large capacitance which cannot be easily embedded in an IC chip together with a relevant power source circuit and switching circuits, so that the capacitor must be separately provided as a discrete component, thereby makes the drive disadvantageously large in size. Another problem arises in the use of such a charge storage capacitor as mentioned above that it requires dummy periods in addition to the scanning periods, which in turn requires controlling the driving potential supplied to the signal electrodes during the dummy periods.
The prior art technique of Patent Document 2 is directed to substantial elimination of the influence of noise voltages generated by rises and falls of a PWM-controlled signal voltage on a simple matrix LCD. In other words, the prior art cannot solve the problems discussed above.